Carrying SR Algorithm information in PCE-based Networks.
draft-ietf-pce-sid-algo-02

PCE Working Group                                               S. Sidor
Internet-Draft                                                  A. Tokar
Intended status: Standards Track                     Cisco Systems, Inc.
Expires: 24 December 2023                                        S. Peng
                                                         ZTE Corporation
                                                            S. Sivabalan
                                                                   Ciena
                                                                 T. Saad
                                                     Cisco Systems, Inc.
                                                                 S. Peng
                                                     Huawei Technologies
                                                                A. Stone
                                                                   Nokia
                                                                 M. Negi
                                                             RtBrick Inc
                                                            22 June 2023

        Carrying SR Algorithm information in PCE-based Networks.
                       draft-ietf-pce-sid-algo-02

Abstract

   The Algorithm associated with a prefix Segment-ID (SID) defines the
   path computation Algorithm used by Interior Gateway Protocols (IGPs).
   This information is available to controllers such as the Path
   Computation Element (PCE) via topology learning.  This document
   proposes an approach for informing headend routers regarding the
   Algorithm associated with each prefix SID used in PCE-computed paths,
   as well as signalling a specific SR algorithm as a constraint to the
   PCE.

Requirements Language

   The key words "MUST", "MUST NOT", "REQUIRED", "SHALL", "SHALL NOT",
   "SHOULD", "SHOULD NOT", "RECOMMENDED", "NOT RECOMMENDED", "MAY", and
   "OPTIONAL" in this document are to be interpreted as described in BCP
   14 [RFC2119] [RFC8174] when, and only when, they appear in all
   capitals, as shown here.

Status of This Memo

   This Internet-Draft is submitted in full conformance with the
   provisions of BCP 78 and BCP 79.

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Copyright Notice

   Copyright (c) 2023 IETF Trust and the persons identified as the
   document authors.  All rights reserved.

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Table of Contents

   1.  Introduction  . . . . . . . . . . . . . . . . . . . . . . . .   3
   2.  Terminology . . . . . . . . . . . . . . . . . . . . . . . . .   4
   3.  Object Formats  . . . . . . . . . . . . . . . . . . . . . . .   4
     3.1.  OPEN Object . . . . . . . . . . . . . . . . . . . . . . .   4
       3.1.1.  SR PCE Capability Sub-TLV . . . . . . . . . . . . . .   4
       3.1.2.  SRv6 PCE Capability sub-TLV . . . . . . . . . . . . .   5
     3.2.  SR-ERO Subobject  . . . . . . . . . . . . . . . . . . . .   5
     3.3.  SRv6-ERO Subobject  . . . . . . . . . . . . . . . . . . .   6
     3.4.  LSPA Object . . . . . . . . . . . . . . . . . . . . . . .   6
   4.  Operation . . . . . . . . . . . . . . . . . . . . . . . . . .   7
     4.1.  SR-ERO and SRv6-ERO Encoding  . . . . . . . . . . . . . .   7
     4.2.  SR Algorithm Constraint . . . . . . . . . . . . . . . . .   8
       4.2.1.  Flexible Algorithm Path computation . . . . . . . . .   9
       4.2.2.  Path computation with SID filtering . . . . . . . . .   9
   5.  Planned enhancements  . . . . . . . . . . . . . . . . . . . .   9
   6.  Security Considerations . . . . . . . . . . . . . . . . . . .  10
   7.  IANA Considerations . . . . . . . . . . . . . . . . . . . . .  10
     7.1.  SR Capability Flag  . . . . . . . . . . . . . . . . . . .  10
     7.2.  SRv6 PCE Capability Flag  . . . . . . . . . . . . . . . .  10
     7.3.  SR-ERO Flag . . . . . . . . . . . . . . . . . . . . . . .  10

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     7.4.  SRv6-ERO Flag . . . . . . . . . . . . . . . . . . . . . .  11
     7.5.  PCEP TLV Types  . . . . . . . . . . . . . . . . . . . . .  11
   8.  Normative References  . . . . . . . . . . . . . . . . . . . .  11
   Appendix A.  Contributors . . . . . . . . . . . . . . . . . . . .  13
   Authors' Addresses  . . . . . . . . . . . . . . . . . . . . . . .  13

1.  Introduction

   A PCE can compute SR-TE paths using SIDs with different Algorithms
   depending on the use-case, constraints, etc.  While this information
   is available on the PCE, there is no method of conveying this
   information to the headend router.

   Similarly, the headend can also compute SR-TE paths using different
   Algorithms, and this information also needs to be conveyed to the PCE
   for collection or troubleshooting purposes.  In addition, in the case
   of multiple (redundant) PCEs, when the headend receives a path from
   the primary PCE, it needs to be able to report the complete path
   information - including the Algorithm - to the backup PCE so that in
   HA scenarios, the backup PCE can verify the prefix SIDs
   appropriately.

   An operator may also want to constrain the path computed by the PCE
   to a specific SR Algorithm, for example, in order to only use SR
   Algorithms for a low-latency path.  A new TLV is introduced for this
   purpose.

   Refer to [RFC8665] and [RFC8667] for details about the prefix SR
   Algorithm.

   This document is extending:

   *  the SR PCE Capability Sub-TLV and the SR-ERO subobject - defined
      in [RFC8664]

   *  the SRv6 PCE Capability sub-TLV and the SRv6-ERO subobject -
      defined in [I-D.ietf-pce-segment-routing-ipv6]

   A new TLV for signalling SR Algorithm constraint to the PCE is also
   introduced, to be carried inside the LSPA object, which is defined in
   [RFC5440].

   The mechanisms described in this document are equally applicable to
   both SR-MPLS and SRv6.

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2.  Terminology

   The following terminologies are used in this document:

   ASLA:  Application-Specific Link Attribute.

   BSID:  Binding Segment Identifier.

   ERO:  Explicit Route Object.

   FAD:  Flexible Algorithm Definition.

   IGP:  Interior Gateway Protocol.

   NAI:  Node or Adjacency Identifier.

   PCE:  Path Computation Element.

   PCEP:  Path Computation Element Protocol.

   SID:  Segment Identifier.

   SR:  Segment Routing.

   SR-TE:  Segment Routing Traffic Engineering.

   LSP:  Label Switched Path.

   LSPA:  Label Switched Path Attributes.

   Winning FAD:  The FAD selected according to rules described in
      Section 5.3 of [RFC9350].

3.  Object Formats

3.1.  OPEN Object

3.1.1.  SR PCE Capability Sub-TLV

   A new flag S is proposed in the SR PCE Capability Sub-TLV introduced
   in Section 4.1.2 of [RFC8664] to indicate support for SR Algorithm.
   If S flag is set, PCEP peer indicates support for Algorithm field in
   SR-ERO Subject and SR Algorithm constraint only for Traffic-
   engineering paths with Segment Routing Path Setup Type.  It is not
   indicating support for these extensions for other Path Setup Types.

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      0                   1                   2                   3
      0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1
     +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
     |         Type=26               |            Length=4           |
     +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
     |         Reserved              |   Flags |S|N|X|      MSD      |
     +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+

3.1.2.  SRv6 PCE Capability sub-TLV

   A new flag S is proposed in the SRv6 PCE Capability sub-TLV
   introduced in 4.1.1 of [I-D.ietf-pce-segment-routing-ipv6] to
   indicate support for SR Algorithm.  If S flag is set, PCEP peer
   indicates support for Algorithm field in SRv6-ERO Subobject and SR
   Algorithm constraint only for Traffic-engineering paths with SRv6
   Path Setup Type.  It is not indicating support for these extensions
   for other Path Setup Types.

    0                   1                   2                   3
    0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1
   +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
   |            Type=TBD1          |            Length             |
   +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
   |            Reserved           |             Flags       |S|N|X|
   +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
   |   MSD-Type    | MSD-Value     |   MSD-Type    |   MSD-Value   |
   +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
   //                             ...                             //
   +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
   |   MSD-Type    | MSD-Value     |            Padding            |
   +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+

3.2.  SR-ERO Subobject

   The SR-ERO subobject encoding is extended with new flag "A" to
   indicate if the Algorithm field is included after other optional
   fields.

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      0                   1                   2                   3
      0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1
     +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
     |L|   Type=36   |     Length    |  NT   |     Flags |A|V|F|S|C|M|
     +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
     |                         SID (optional)                        |
     +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
     //                   NAI (variable, optional)                  //
     +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
     |                  Reserved                     |  Algorithm    |
     +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+

3.3.  SRv6-ERO Subobject

   The SRv6-ERO subobject encoding is extended with new flag "A" to
   indicate if the Algorithm field is included after other optional
   fields.

      0                   1                   2                   3
      0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1
     +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
     |L|   Type=TBD3 |     Length    |   NT  |    Flags    |A|V|T|F|S|
     +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
     |            Reserved           |        Endpoint Behavior      |
     +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
     |                                                               |
     |                      SRv6 SID (optional)                      |
     |                           (128-bit)                           |
     |                                                               |
     +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
     //                    NAI (variable, optional)                 //
     +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
     |                     SID Structure (optional)                  |
     +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
     |                  Reserved                     |  Algorithm    |
     +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+

3.4.  LSPA Object

   A new TLV for the LSPA Object with TLV type=TBD3 is introduced to
   carry the SR Algorithm constraint.  This TLV SHOULD only be used when
   PST (Path Setup type) = SR or SRv6.  Only the first instance of this
   TLV SHOULD be processed, subsequent instances SHOULD be ignored

   The format of the SR Algorithm TLV is as follows:

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      0                   1                   2                   3
      0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1
     +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
     |         Type=TBD3             |            Length=4           |
     +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
     |         Reserved              |   Flags   |F|S|   Algorithm   |
     +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+

                     Figure 1: SR Algorithm TLV Format

   The code point for the TLV type is TBD3.  The TLV length is 4 octets.

   The 32-bit value is formatted as follows.

   Reserved:  MUST be set to zero by the sender and MUST be ignored by
      the receiver.

   Flags:  This document defines the following flag bits.  The other
      bits MUST be set to zero by the sender and MUST be ignored by the
      receiver.

      *  S (Strict): If set, the PCE MUST fail the path computation if
         specified SR algorithm constraint cannot be satisfied.  If
         unset, the PCE MAY ignore specified algorithm constraint.

      *  F (Flexible Algorithm Path Computation): If set, the PCE
         follows procedures defined in Section 4.2.1.  If unset, the PCE
         follows procedures defined in Section 4.2.2.  The flag SHOULD
         be ignored if Algorithm field is set to value in range 0 to
         127.

   Algorithm:  SR Algorithm the PCE MUST take into acount while
      computing a path for the LSP.

4.  Operation

   The PCEP protocol extensions defined in Sections 3.2, 3.3 and 3.4 of
   this draft MUST NOT be used if one or both PCEP speakers have not
   indicated the support using S flag in Path Setup Type specific Sub-
   TLVs in their respective OPEN messages.

4.1.  SR-ERO and SRv6-ERO Encoding

   PCEP speaker MAY set the A flag and include the Algorithm field in
   SR-ERO or SRv6-ERO subobject if the S flag was advertised by both
   PCEP speakers.

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   If PCEP peer receives SR-ERO subobject with the A flag set or with
   the SR Algorithm included, but the S flag was not advertised, then it
   MUST consider entire ERO as invalid as described in Section 5.2.1 of
   [RFC8664]

   The Algorithm field MUST be included after optional SID, NAI or SID
   structure and length of SR-ERO or SRv6-ERO subobject MUST be
   increased with additional 4 bytes for Reserved and Algorithm field.

   If the length and the A flag are not consistent, it MUST consider the
   entire ERO invalid and MUST send a PCErr message with Error-Type = 10
   ("Reception of an invalid object") and Error-value = 11 ("Malformed
   object").

4.2.  SR Algorithm Constraint

   In order to signal a specific SR Algorithm constraint to the PCE, the
   headend MUST encode the SR ALGORITHM TLV inside the LSPA object.

   If PCEP peer receives LSPA object with SR ALGORITHM TLV in it, but
   the S flag was not advertised, then PCEP peer MUST ignore it as per
   Section 7.1 of [RFC5440].

   Path computation MUST occur on the topology associated with specified
   SR algorithm.  The PCE MUST NOT use Prefix SIDs of SR Algorithm other
   than specified in algorithm constraint.  It is allowed to use other
   SID types (e.g., Adjacency or Binding SID), but only from nodes
   participating in specified SR algorithm.

   Specified Algorithm constraint is applied to end-to-end SR policy
   path.  Using different Algorithm constraint in each domain or part of
   the topology in single path computation is out of scope of this
   document.  One possible solution is to determine FAD mapping using
   PCE local policy.

   If the PCE is unable to find a path with the given SR Algorithm
   constraint or it does not support combination of specified
   constraints, it MAY respond with empty path to indicate that it was
   not able to find valid path.

   If headend is part of multiple IGP domains and winning FAD for
   specified SR Algorithm in each of them has different constraints, the
   PCE implementation MAY have local policy with defined behavior for
   selecting FAD for such path-computation or even completely not
   supporting it.  It is RECOMMENDED to respond with empty path if such
   path-computation is not supported.

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   SR Algorithm does not replace the Objective Function defined in
   [RFC5541]

4.2.1.  Flexible Algorithm Path computation

   The PCE MUST follow IGP Flexible Algorithm path computation logic as
   described in [RFC9350].  That includes using same ordered rules to
   select FAD if multiple FADs are available, considering node
   participation of specified SR algorithm in the path computation,
   using ASLA specific link attributes and other rules for Flexible
   Algorithm path computation described in that document.

   The PCE MUST optimize computed path based on metric type specified in
   the FAD, metric type included in PCEP messages from PCC MUST be
   ignored.  The PCE SHOULD use metric type from FAD in messages sent to
   the PCC.

   The PCE MUST use constraints specified in the FAD and also
   constraints directly included in PCEP messages from PCC.  The PCE
   implementation MAY decide to ignore specific constraints received
   from PCC based on existing processing rules for PCEP Objects and
   TLVs, e.g.  P flag described in Section 7.2 of [RFC5440] and
   processing rules described in [I-D.ietf-pce-stateful-pce-optional].
   If the PCE does not support specified combination of constraints, it
   MAY respond with PCEP message with empty ERO.  PCC MUST NOT include
   constraints from FAD in PCEP message sent to PCE as it can result in
   undesired behavior in various cases.  PCE SHOULD NOT include
   constraints from FAD in PCEP messages sent to PCC.

4.2.2.  Path computation with SID filtering

   The SR Algorithm constraint acts as a filter, restricting which SIDs
   may be used as a result of the path computation function.  Path
   computation is done based on optimization metric type and constraints
   specified in PCEP message received from PCC.

   If specified SR Algorithm is Flexible Algorithm, the PCE MUST ensure
   that IGP path of Flex-algo SIDs is congruant with computed path.

5.  Planned enhancements

   List of remaining items tracked for future draft versions, which
   requires more discussion.

   Error reporting:  More granular indication of reason for failed path
      computation, e.g. in case of unsupported combination of
      constraints.

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6.  Security Considerations

   No additional security measure is required.

7.  IANA Considerations

7.1.  SR Capability Flag

   IANA maintains a sub-registry, named "SR Capability Flag Field",
   within the "Path Computation Element Protocol (PCEP) Numbers"
   registry to manage the Flags field of the SR-PCE-CAPABILITY TLV.
   IANA is requested to make the following assignment:

            +=======+=========================+===============+
            | Value | Description             | Reference     |
            +=======+=========================+===============+
            +-------+-------------------------+---------------+
            |  TBD1 | SR Algorithm Capability | This document |
            +-------+-------------------------+---------------+

                                  Table 1

7.2.  SRv6 PCE Capability Flag

   IANA was requested in [I-D.ietf-pce-segment-routing-ipv6] to create a
   sub-registry, named "SRv6 PCE Capability Flags", within the "Path
   Computation Element Protocol (PCEP) Numbers" registry to manage the
   Flags field of SRv6-PCE-CAPABILITY sub-TLV.  IANA is requested to
   make the following assignment:

            +=======+=========================+===============+
            | Value | Description             | Reference     |
            +=======+=========================+===============+
            +-------+-------------------------+---------------+
            |  TBD2 | SR Algorithm Capability | This document |
            +-------+-------------------------+---------------+

                                  Table 2

7.3.  SR-ERO Flag

   IANA maintains a sub-registry, named "SR-ERO Flag Field", within the
   "Path Computation Element Protocol (PCEP) Numbers" registry to manage
   the Flags field of the SR-ERO Subobject.  IANA is requested to make
   the following assignment:

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               +=======+===================+===============+
               | Value | Description       | Reference     |
               +=======+===================+===============+
               +-------+-------------------+---------------+
               |  TBD3 | SR Algorithm Flag | This document |
               +-------+-------------------+---------------+

                                  Table 3

7.4.  SRv6-ERO Flag

   IANA was requested in [I-D.ietf-pce-segment-routing-ipv6], named
   "SRv6-ERO Flag Field", within the "Path Computation Element Protocol
   (PCEP) Numbers" registry to manage the Flags field of the SRv6-ERO
   subobject.  IANA is requested to make the following assignment:

               +=======+===================+===============+
               | Value | Description       | Reference     |
               +=======+===================+===============+
               +-------+-------------------+---------------+
               |  TBD4 | SR Algorithm Flag | This document |
               +-------+-------------------+---------------+

                                  Table 4

7.5.  PCEP TLV Types

   IANA is requested to allocate a new TLV type for the new LSPA TLV
   specified in this document.

                 +=======+==============+===============+
                 | Value | Description  | Reference     |
                 +=======+==============+===============+
                 +-------+--------------+---------------+
                 |  TBD5 | SR algorithm | This document |
                 +-------+--------------+---------------+

                                 Table 5

8.  Normative References

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   [I-D.ietf-pce-segment-routing-ipv6]
              Li, C., Negi, M. S., Sivabalan, S., Koldychev, M.,
              Kaladharan, P., and Y. Zhu, "Path Computation Element
              Communication Protocol (PCEP) Extensions for Segment
              Routing leveraging the IPv6 dataplane", Work in Progress,
              Internet-Draft, draft-ietf-pce-segment-routing-ipv6-16, 6
              March 2023, <https://datatracker.ietf.org/doc/html/draft-
              ietf-pce-segment-routing-ipv6-16>.

   [I-D.ietf-pce-stateful-pce-optional]
              Li, C., Zheng, H., and S. Litkowski, "Extension for
              Stateful PCE to allow Optional Processing of PCE
              Communication Protocol (PCEP) Objects", Work in Progress,
              Internet-Draft, draft-ietf-pce-stateful-pce-optional-05,
              11 January 2023, <https://datatracker.ietf.org/doc/html/
              draft-ietf-pce-stateful-pce-optional-05>.

   [RFC2119]  Bradner, S., "Key words for use in RFCs to Indicate
              Requirement Levels", BCP 14, RFC 2119,
              DOI 10.17487/RFC2119, March 1997,
              <https://www.rfc-editor.org/info/rfc2119>.

   [RFC5440]  Vasseur, JP., Ed. and JL. Le Roux, Ed., "Path Computation
              Element (PCE) Communication Protocol (PCEP)", RFC 5440,
              DOI 10.17487/RFC5440, March 2009,
              <https://www.rfc-editor.org/info/rfc5440>.

   [RFC5541]  Le Roux, JL., Vasseur, JP., and Y. Lee, "Encoding of
              Objective Functions in the Path Computation Element
              Communication Protocol (PCEP)", RFC 5541,
              DOI 10.17487/RFC5541, June 2009,
              <https://www.rfc-editor.org/info/rfc5541>.

   [RFC8174]  Leiba, B., "Ambiguity of Uppercase vs Lowercase in RFC
              2119 Key Words", BCP 14, RFC 8174, DOI 10.17487/RFC8174,
              May 2017, <https://www.rfc-editor.org/info/rfc8174>.

   [RFC8664]  Sivabalan, S., Filsfils, C., Tantsura, J., Henderickx, W.,
              and J. Hardwick, "Path Computation Element Communication
              Protocol (PCEP) Extensions for Segment Routing", RFC 8664,
              DOI 10.17487/RFC8664, December 2019,
              <https://www.rfc-editor.org/info/rfc8664>.

   [RFC8665]  Psenak, P., Ed., Previdi, S., Ed., Filsfils, C., Gredler,
              H., Shakir, R., Henderickx, W., and J. Tantsura, "OSPF
              Extensions for Segment Routing", RFC 8665,
              DOI 10.17487/RFC8665, December 2019,
              <https://www.rfc-editor.org/info/rfc8665>.

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   [RFC8667]  Previdi, S., Ed., Ginsberg, L., Ed., Filsfils, C.,
              Bashandy, A., Gredler, H., and B. Decraene, "IS-IS
              Extensions for Segment Routing", RFC 8667,
              DOI 10.17487/RFC8667, December 2019,
              <https://www.rfc-editor.org/info/rfc8667>.

   [RFC9350]  Psenak, P., Ed., Hegde, S., Filsfils, C., Talaulikar, K.,
              and A. Gulko, "IGP Flexible Algorithm", RFC 9350,
              DOI 10.17487/RFC9350, February 2023,
              <https://www.rfc-editor.org/info/rfc9350>.

Appendix A.  Contributors

   Mike Koldychev
   Cisco Systems, Inc.
   Email: mkoldych@cisco.com

   Zafar Ali
   Cisco Systems, Inc.
   Email: zali@cisco.com

   Stephane Litkowski
   Cisco Systems, Inc.
   Email: slitkows.ietf@gmail.com

Authors' Addresses

   Samuel Sidor
   Cisco Systems, Inc.
   Eurovea Central 3.
   Pribinova 10
   811 09 Bratislava
   Slovakia
   Email: ssidor@cisco.com

   Alex Tokar
   Cisco Systems, Inc.
   2300 East President George
   Richardson,  TX 75082
   United States of America
   Email: atokar@cisco.com

Sidor, et al.           Expires 24 December 2023               [Page 13]
Internet-Draft            SR Algorithm in PCEP                 June 2023

   Shaofu Peng
   ZTE Corporation
   No.50 Software Avenue
   Nanjing
   Jiangsu, 210012
   China
   Email: peng.shaofu@zte.com.cn

   Siva Sivabalan
   Ciena
   385 Terry Fox Drive
   Kanata Ontario K2K 0L1
   Canada
   Email: msiva282@gmail.com

   Tarek Saad
   Cisco Systems, Inc.
   Email: tsaad.net@gmail.com

   Shuping Peng
   Huawei Technologies
   Huawei Campus, No. 156 Beiqing Rd.
   Beijing
   100095
   China
   Email: pengshuping@huawei.com

   Andrew Stone
   Nokia
   Email: andrew.stone@nokia.com

   Mahendra Singh Negi
   RtBrick Inc
   Bangalore
   Karnataka
   India
   Email: mahend.ietf@gmail.com

Sidor, et al.           Expires 24 December 2023               [Page 14]