Control plane architecture in GMPLS networks

Document Type Expired Internet-Draft (individual)
Author Kohei Shiomoto 
Last updated 2004-02-18 (latest revision 2004-02-17)
Stream (None)
Intended RFC status (None)
Expired & archived
pdf htmlized (tools) htmlized bibtex
Stream Stream state (No stream defined)
Consensus Boilerplate Unknown
RFC Editor Note (None)
IESG IESG state Expired
Telechat date
Responsible AD (None)
Send notices to (None)

This Internet-Draft is no longer active. A copy of the expired Internet-Draft can be found at


This document addresses control plane architecutre in GMPLS enabled IP- Optical networks. Two different control plane architectures are consid- ered: symmetical and asymmetrical control plane architectures. Addressing (router-ID, control plane address, and TE link address) and RSVP message handling (routing, HOP and ERO objects processing) are discussed for both architectures.The document also recommends normal practises for identification of TE links. Interwork between symmetrical and asymmetrical control plane is addressed.


Kohei Shiomoto (

(Note: The e-mail addresses provided for the authors of this Internet-Draft may no longer be valid.)